gem5.components.processors.linear_generator_core module

class gem5.components.processors.linear_generator_core.LinearGeneratorCore(duration: str, rate: str, block_size: int, min_addr: int, max_addr: int, rd_perc: int, data_limit: int)

Bases: AbstractGeneratorCore

abstract = False

connect_dcache(port: Port) → None

This function should connect the response port from the data cache to the right request port on the core.

Parameters:

port – The response port from the icache to connect to.

cxx_exports = []

cxx_extra_bases = []

cxx_param_exports = []

cxx_template_params = []

start_traffic() → None

External interface to start generating the trace of addresses.

Depending on what SimObject is wrapped by this component this method might need be implemented.