gem5.components.memory.dram_interfaces.ddr3 module

Interfaces for DDR3 memories

These memory “interfaces” contain the timing, energy, etc. parameters for each memory type and are usually based on datasheets for the memory devices.

You can use these interfaces in the MemCtrl object as the dram timing interface.

class gem5.components.memory.dram_interfaces.ddr3.DDR3_1600_8x8(**kwargs)

Bases: DRAMInterface

A single DDR3-1600 x64 channel (one command and address bus), with timings based on a DDR3-1600 4 Gbit datasheet (Micron MT41J512M8) in an 8x8 configuration.

abstract = False

cxx_exports = []

cxx_extra_bases = []

cxx_param_exports = []

cxx_template_params = []

class gem5.components.memory.dram_interfaces.ddr3.DDR3_2133_8x8(**kwargs)

Bases: DDR3_1600_8x8

A single DDR3-2133 x64 channel refining a selected subset of the options for the DDR-1600 configuration, based on the same DDR3-1600 4 Gbit datasheet (Micron MT41J512M8). Most parameters are kept consistent across the two configurations.

abstract = False

cxx_exports = []

cxx_extra_bases = []

cxx_param_exports = []

cxx_template_params = []